Conventionally, non-volatile semiconductor memory devices using semiconductor devices such as EEPROMs, AND-type flash memories, NOR-type flash memories and NAND-type flash memories are widely known. With the NAND-type flash memories among these, each memory cell shares a source/drain diffusion layer, and is suitable for a higher density.
At an end of a memory cell array of a NAND-type flash memory, a sense amplifier unit is provided which detects and amplifies data of a memory cell read from a bit line. Further, upon an erase operation of a memory cell in which a high erase voltage is applied to a bit line, it is necessary to prevent this high erase voltage from being applied to a transistor of the sense amplifier unit. Hence, a bit line connecting transistor which controls a connected state and a non-connected state between a bit line and a sense amplifier unit is arranged between the bit line and the sense amplifier unit.